Adaptive voltage and frequency scaling (AVFS) techniques compensate for process-voltage-temperature (PVT) and aging related variations in integrated circuits or chips. Canary circuits are used as part of the AVFS to monitor frequency and voltage headroom of various circuits and are designed to fail before the actual electronic device or circuit. Static random access memories (SRAMs) come in a variety of sizes and those having array sizes on the order of 2 MB, for example, present a particular challenge in monitoring in that the read/write speeds are largely dictated by large local variations as opposed to across the chip or global variations. The canary circuits for these large SRAMs do not take into account the large timing impact of bitcells that are degraded due to mostly local variations. The canary circuits may have some ability to track global variations but these global variations are generally minimal or in the noise as compared to the impact of the local variations.